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Digital Verification Engineer (H/F)

ELSYS DESIGN· Milan, Italie· repérée il y a 71 jours
Ingénierie & Industrie
Lieu
Milan, Italie
Durée
24 mois
Indemnité
3004 € / mois
Début
décembre 2026
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La mission

ELSYS Design is a European engineering company specialized in electronics, embedded systems, software and complex systems design. As part of the ADVANS Group, ELSYS Design works with major industrial players across Europe. As part of its international expansion, ELSYS Design is reinforcing its presence in Italy, a strategic market for industrial electronics, automotive, semiconductors and energy sectors. Mission description We are looking for a Microelectronics engineer, with a first successful experience in Digital Verification at the IP or System on Chip level to reinforce our teams in Milan, ITALY. Here are all your responsibilities: Verification activities Define and develop verification plans aligned with design specifications Contribute to test bench development using SystemVerilog / UVM Execute simulation campaigns and validate results Analysis & debugging Analyze simulation results and identify functional issues Debug designs at RTL, subsystem and system level Support verification closure through coverage metrics Engineering contribution Participate in verification environment setup Contribute to automation using scripting tools (Python, Tcl, etc.) Work closely with design, backend and system teams Additional missions Proof-of-concept development (performance, power, capacity analysis of SoCs) Contribution to embedded features or system validation (depending on project)